301467-005 Datasheet, PDF (7/426 Pages) Intel Corporation – Express Chipset

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9.1.5
9.1.6
9.1.7
9.1.8
9.1.9
9.1.10
9.1.11
9.1.12
9.1.13
9.1.14
9.1.15
9.1.16
9.1.17
9.1.18
9.1.19
9.1.20
9.1.21
9.1.22
9.1.23
9.1.24
9.1.25
9.1.26
9.1.27
9.1.28
9.1.29
9.1.30
9.1.31
9.1.32
9.1.33
RID2—Revision Identification (D2:F0)................................................ 178
CC—Class Code (D2:F0) ................................................................... 178
CLS—Cache Line Size (D2:F0).......................................................... 179
MLT2—Master Latency Timer (D2:F0)............................................... 179
HDR2—Header Type (D2:F0) ............................................................ 180
MMADR—Memory Mapped Range Address (D2:F0) ........................ 180
IOBAR—I/O Base Address (D2:F0) ................................................... 181
GMADR—Graphics Memory Range Address (D2:F0) ....................... 182
GTTADR—Graphics Translation Table Range Address (D2:F0)....... 183
SVID2—Subsystem Vendor Identification (D2:F0)............................. 183
SID2—Subsystem Identification (D2:F0)............................................ 184
ROMADR—Video BIOS ROM Base Address (D2:F0) ....................... 184
CAPPOINT—Capabilities Pointer (D2:F0) ......................................... 185
INTRLINE—Interrupt Line (D2:F0) ..................................................... 185
INTRPIN—Interrupt Pin (D2:F0) ......................................................... 185
MINGNT—Minimum Grant (D2:F0) .................................................... 186
MAXLAT—Maximum Latency (D2:F0) ............................................... 186
MCAPPTR—Mirror of Dev0 Capability Pointer (D2:F0)
(Mirrored_D0_34) ............................................................................... 186
MCAPID—Mirror of Dev0 Capability Identification (D2:F0)
(Mirrored_D0_E0) ............................................................................... 186
MGGC—Mirror of Dev0 GMCH Graphics Control (D2:F0)
(Mirrored_D0_52) ............................................................................... 187
MDEVENdev0f0—Mirror of Dev0 Device Enable (D2:F0)
(Mirrored_D0_54) ............................................................................... 187
BSM—Base of Stolen Memory (D2:F0).............................................. 187
MSAC—Multi Size Aperture Control (D2:F0) ..................................... 188
PMCAPID—Power Management Capabilities ID (D2:F0).................. 188
PMCAP—Power Management Capabilities (D2:F0) .......................... 189
PMCS—Power Management Control/Status (D2:F0) ........................ 190
SWSMI—Software SMI (D2:F0) ......................................................... 191
ASLE—System Display Event Register (D2:F0) ................................ 191
ASLS—ASL Storage (D2:F0) ............................................................. 192
10
Device 2 Function 1 (D2:F1) Configuration Registers (Intel^®
82915G/82915GV/82915GL/ 82910GL Only)................................................................. 193
10.1 Device 2 Function 1 Configuration Register Details (D2:F1) ............................. 194
10.1.1 VID2—Vendor Identification (D2:F1) .................................................. 194
10.1.2 DID2—Device Identification (D2:F1) .................................................. 194
10.1.3 PCICMD2—PCI Command (D2:F1) ................................................... 195
10.1.4 PCISTS2—PCI Status (D2:F1)........................................................... 196
10.1.5 RID2—Revision Identification (D2:F1)................................................ 197
10.1.6 CC—Class Code Register (D2:F1)..................................................... 197
10.1.7 CLS—Cache Line Size (D2:F1).......................................................... 197
10.1.8 MLT2—Master Latency Timer (D2:F1)............................................... 198
10.1.9 HDR2—Header Type Register (D2:F1).............................................. 198
10.1.10 MMADR—Memory Mapped Range Address (D2:F1) ........................ 198
10.1.11 SVID2—Subsystem Vendor Identification (D2:F1)............................. 199
10.1.12 SID2—Subsystem Identification (D2:F1)............................................ 199
10.1.13 ROMADR—Video BIOS ROM Base Address (D2:F1) ....................... 199
10.1.14 CAPPOINT—Capabilities Pointer (D2:F1) ......................................... 199
10.1.15 MINGNT—Minimum Grant Register (D2:F1)...................................... 200
10.1.16 MAXLAT—Maximum Latency (D2:F1) ............................................... 200
Datasheet
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