301467-005 Datasheet, PDF (229/426 Pages) Intel Corporation – Express Chipset

Functional Description
R
Table 12-4. DRAM Address Translation (Single Channel/Dual Asymmetric Mode)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3
256 Mb x16 4i
256 Mb x8 4i
512 Mb x16 4i
512 Mb x8 4i
512 Mb x16 4i
512 Mb x8 4i
1 Gb x16 4i
1 Gb x8
4i
1 Gb x16 8i
1 Gb x8
8i
4 KB 128 MB
8 KB 256 MB
8 KB 256 MB
16 KB 512 MB
8 KB 256 MB
8 KB 512 MB
8 KB 512 MB
16 KB 1 GB
8 KB 512 MB
8 KB 1 GB
r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 r12 b0 b1 c8 c7 c6 c5 c4 c3 c2 c1 c0
r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
r11 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 b0 b1 c11 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
r13 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
r13 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 r11 b1 b0 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
r13 r11 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 b0 b1 c11 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
r11 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 b0 b1 b2 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
r13 r11 r12 r10 r9 r8 r7 r6 r5 r4 r3 r2 r1 r0 b0 b1 b2 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0
NOTES:
1. b – ‘bank’ select bit
2. c – ‘column’ address bit
3. r – ‘row’ address bit
Datasheet
229