301467-005 Datasheet, PDF (184/426 Pages) Intel Corporation – Express Chipset

Integrated Graphics Device Registers (D2:F0)
(Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only)
R
9.1.15
SID2—Subsystem Identification (D2:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
2
2Eh
0000h
R/WO
16 bits
Bit
Access &
Default
Description
15:0
R/WO
Subsystem Identification: This value is used to identify a particular subsystem.
0000h
This field should be programmed by BIOS during boot-up. Once written, this
register becomes Read Only. This register can only be cleared by a Reset.
9.1.16
ROMADR—Video BIOS ROM Base Address (D2:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
2
30h
00000000h
RO
32 bits
The IGD does not use a separate BIOS ROM; therefore, this register is hardwired to 0s.
Bit
31:18
17:11
10:1
0
Access &
Default
RO
0000h
RO
00h
RO
0b
Description
ROM Base Address: Hardwired to 0s.
Address Mask: Hardwired to 0s to indicate 256-KB address range.
Reserved
ROM BIOS Enable: 0 = ROM not accessible.
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Datasheet