301467-005 Datasheet, PDF (183/426 Pages) Intel Corporation – Express Chipset

Integrated Graphics Device Registers (D2:F0)
(Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only)
R
9.1.13
GTTADR—Graphics Translation Table Range Address
(D2:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
2
1Ch
00000000h
RO, R/W
32 bits
This register requests allocation for Graphics Translation Table Range. The allocation is for
256 KB and the base address is defined by bits [31:18].
Bit
31:18
17:4
3
2:1
0
Access &
Default
R/W
0000h
RO
0000h
RO
0b
RO
00b
RO
0b
Description
Memory Base Address: Set by the OS, these bits correspond to address
signals [31:18].
Address Mask: Hardwired to 0s to indicate 256-KB address range.
Prefetchable Memory: Hardwired to 0 to prevent prefetching.
Memory Type: Hardwired to 0s to indicate 32-bit address.
Memory/IO Space: Hardwired to 0 to indicate memory space.
9.1.14
SVID2—Subsystem Vendor Identification (D2:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
2
2Ch
0000h
R/WO
16 bits
Bit
Access &
Default
Description
15:0
R/WO
Subsystem Vendor ID. This value is used to identify the vendor of the
0000h
subsystem. This register should be programmed by BIOS during boot-up. Once
written, this register becomes Read-Only. This register can only be cleared by a
Reset.
Datasheet
183