301467-005 Datasheet, PDF (182/426 Pages) Intel Corporation – Express Chipset

Integrated Graphics Device Registers (D2:F0)
(Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only)
R
9.1.12
GMADR—Graphics Memory Range Address (D2:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
2
18h
00000008h
RO, R/W/L
16 bits
IGD graphics memory base address is specified in this register.
Bit
31:28
27
26:4
3
2:1
0
Access &
Default
R/W
0h
R/W/L
0b
RO
000000h
RO
1b
RO
00b
RO
0b
Description
Memory Base Address: Set by the OS, these bits correspond to address
signals [31:28].
256-MB Address Mask: This bit is either part of the Memory Base Address
(R/W) or part of the Address Mask (RO), depending on the value of MSAC[1].
See MSAC (Dev 2, Func 0, offset 62) for details.
Address Mask: Hardwired to 0s to indicate at least 128-MB address range
Prefetchable Memory: Hardwired to 1 to enable prefetching
Memory Type: Hardwired to 0 to indicate 32-bit address.
Memory/IO Space: Hardwired to 0 to indicate memory space.
182
Datasheet