301467-005 Datasheet, PDF (32/426 Pages) Intel Corporation – Express Chipset

Introduction
R
1.3.9
All of the above mentioned clocks are capable of tolerating Spread Spectrum clocking as defined
in the Clock Generator specification. Host, Memory, and PCI Express* x16 Graphics PLLs, and
all associated internal clocks are disabled until PWROK is asserted.
Power Management
(G)MCH Power Management support includes:
• PC99 suspend to DRAM support (“STR”, mapped to ACPI state S3)
• SMRAM space remapping to A0000h (128 KB)
• Supports extended SMRAM space above 256 MB, additional 1-MB TSEG from the Base of
graphics stolen memory (BSM) when enabled, and cacheable (cacheability controlled by
processor)
• ACPI Rev 1.0 compatible power management
• Supports processor states: C0, C1, C2, C3, and C4
• Supports System states: S0, S1, S3, S4, and S5
• Supports processor Thermal Management 2 (TM2)
• Microsoft Windows NT* Hardware Design Guide v1.0 compliant
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Datasheet