301467-005 Datasheet, PDF (185/426 Pages) Intel Corporation – Express Chipset

Integrated Graphics Device Registers (D2:F0)
(Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only)
R
9.1.17
CAPPOINT—Capabilities Pointer (D2:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
2
34h
D0h
RO
8 bits
Bit
Access &
Default
Description
7:0
RO
Capabilities Pointer Value: This field contains an offset into the function’s PCI
D0h
configuration space for the first item in the New Capabilities Linked List; the
Power Management Capabilities ID registers at address D0h.
9.1.18
INTRLINE—Interrupt Line (D2:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
2
3Ch
00h
R/W
8 bits
Bit
Access &
Default
Description
7:0
R/W
Interrupt Connection: This field is used to communicate interrupt line routing
00h
information. POST software writes the routing information into this register as it
initializes and configures the system. The value in this register indicates which
input of the system interrupt controller that the device’s interrupt pin is connected
to.
9.1.19
INTRPIN—Interrupt Pin (D2:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
2
3Dh
01h
RO
8 bits
Bit
Access &
Default
Description
7:0
RO
Interrupt Pin: As a device that only has interrupts associated with a single
01h
function, the IGD specifies INTA# as its interrupt pin.
01h = INTA#.
Datasheet
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