301467-005 Datasheet, PDF (106/426 Pages) Intel Corporation – Express Chipset

MCHBAR Registers
R
5.1.11
5.1.12
5.1.13
5.1.14
5.1.15
C1DRB0—Channel B DRAM Rank Boundary Address 0
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
MCHBAR
180h
00h
R/W
8 bits
The operation of this register is detailed in the description for register C0DRB0.
C1DRB1—Channel B DRAM Rank Boundary Address 1
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
MCHBAR
181h
00h
R/W
8 bits
The operation of this register is detailed in the description for register C0DRB0.
C1DRB2—Channel B DRAM Rank Boundary Address 2
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
MCHBAR
182h
00h
R/W
8 bits
The operation of this register is detailed in the description for register C0DRB0.
C1DRB3—Channel B DRAM Rank Boundary Address 3
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
MCHBAR
183h
00h
R/W
8 bits
The operation of this register is detailed in the description for register C0DRB0.
C1DRA0—Channel B DRAM Rank 0,1 Attribute
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
MCHBAR
188h
00h
R/W
8 bits
The operation of this register is detailed in the description for register C0DRA0.
106
Datasheet