301467-005 Datasheet, PDF (57/426 Pages) Intel Corporation – Express Chipset

Register Description
R
Figure 3-2. Register Organization (Representative of the Intel^® 82915G GMCH)
FFFh
Device 2 Configuration
Registers: Internal Graphics
Unused
0FFh
000h
FFFh
0FFh
Mirror of bits needed by
graphics driver graphics
thermal controls
Device 1 Configuration
Registers: PCI Express X16
PCI Express x16 Controls:
Analog Controls
Error Reporting Controls
VC Controls
Hot Plug/Slot Controls
Device Level Controls
000h
FFFh
Device 0 Configuration
Registers
FFFh
PCI Express* Egress Port
(RCRB)
VC1 (Isochronous) Port
Arbitration Controls
000h
DMI Root Complex Register
FFFh
Block (RCRB)
(G)MCH-ICH6 Serial Interface
(DMI) Controls:
Analog Controls Error
Reporting Controls VC Control
(Incl. VCp)
000h
0FFF FFFFh
PCI Express Address Range
Accessed only by PCI
Express enhanced access
mechanism. 4KB block
allocated for each potential
device in root hierarchy.
0000 0000h
Device 2 Range
Device 1 Range
Device 0 Range
Unused
0FFh
000h
Device Level Controls, PAM
EPBAR
DMI BAR
PCIEXBAR
MCHBAR
Note: Diagram not to scale
3FFFh
0000h
Device 0 MMIO Registers:
(G)MCH Control
Thermal Sensor PSB Analog
Controls (Rcomp+)
CH 0/1 Analog Controls
CH 0/1 Timing Controls
Ch 0/1 Throttling
Ch 0/1 Oranization Arviter
Controls
Reg_Org_82915G
NOTES:
1. Very high level representation. Many details omitted.
2. Inter graphics memory mapped registers are not shown.
3. Only Device 1 use PCI Express extended configuration space.
4. Device 0 and Device 2 use only standard PCI configuration space.
5. Hex numbers represent address range size and not actual locations.
Table 3-1. Device Number Assignment for Internal (G)MCH Devices
(G)MCH Function
Host Bridge / DRAM Controller
Host-to-PCI Express* Bridge (virtual P2P) (Intel^® 82915G/82915P/82915PL
(G)MCH only)
Internal Graphics Control (82915G/82915GV/82915GL/82910GL GMCH
only)
Device#
Device 0
Device 1
Device 2
Datasheet
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