301467-005 Datasheet, PDF (120/426 Pages) Intel Corporation – Express Chipset

DMIBAR Registers—Direct Media Interface (DMI) RCRB
R
7.1.7
DMIVC0RSTS—DMI VC0 Resource Status
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
DMIBAR
01Ah
00000002h
RO
16 bits
This register reports the Virtual Channel specific status.
Bit
Access &
Default
Description
15:2
Reserved
1
RO
VC Negotiation Pending (NP):
1b
0 = Virtual channel is Not being negotiated with ingress ports.
1 = Virtual channel is still being negotiated with ingress ports.
0
RO
Port Arbitration Tables Status (ATS): There is no port arbitration table for this
0b
VC, so this bit is reserved at 0.
7.1.8
DMIVC1RCAP—DMI VC1 Resource Capability
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
DMIBAR
01Ch
00008001h
RO
32 bits
Bit
31:24
23
22:16
15
14
13:8
7:0
Access &
Default
Description
RO
Port Arbitration Table Offset (AT): This field indicates the location of the port
00h
arbitration table in the root complex. A value of 3h indicates the table is at offset
30h.
Reserved
RO
Maximum Time Slots (MTS): This value is updated by platform BIOS based upon
00h
the determination of the number of time slots available in the platform.
RO
Reject Snoop Transactions (RTS): All snoopable transactions on VC1 are
1b
rejected. This VC is for isochronous transfers only.
RO
Advanced Packet Switching (APS): This VC is capable of all transactions, not
0b
just advanced packet switching transactions.
Reserved
RO
Port Arbitration Capability (PAC): This field indicates the port arbitration
01h
capability is time-based WRR of 128 phases.
120
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