301467-005 Datasheet, PDF (250/426 Pages) Intel Corporation – Express Chipset

Functional Description
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12.7.1.4
DDC (Display Data Channel)
DDC is a standard defined by VESA. Its purpose is to allow communication between the host
system and display. Both configuration and control information can be exchanged allowing plug-
and-play systems to be realized. Support for DDC 1 and 2 is implemented. The GMCH uses the
DDC_CLK and DDC_DATA signals to communicate with the analog monitor. The GMCH
generates these signals at 2.5 V. External pull-up resistors and level shifting circuitry should be
implemented on the board.
The GMCH implements a hardware GMBus controller that can be used to control these signals
allowing for transactions speeds up to 400 kHz.
12.7.2 Digital Display Interface
The GMCH has several options for driving digital displays. The GMCH contains two SDVO
ports that are multiplexed on the PCI Express* x16 Graphics Interface. When an external PCI
Express* x16 Graphics Interface graphics accelerator is not present, the GMCH can use the
multiplexed SDVO ports to provide extra digital display options. These additional digital display
capabilities may be provided through an ADD2 card that is designed to plug in to a PCI Express
connector.
12.7.2.1
Digital Display Channels – SDVOB and SDVOC
The GMCH has the capability to support digital display devices through two SDVO ports. When
an external graphics accelerator is used via the PCI Express* x16 Graphics Interface port, these
SDVO ports are not available.
The shared SDVO ports each support a pixel clock up to 200 MHz and can support a variety of
transmission devices. When using a dual-channel external transmitter, it will be possible to pair
the two SDVO ports in dual-channel mode to support a single digital display with higher
resolutions and refresh rates. In this mode, GMCH is capable of driving pixel clock up to
400 MHz.
SDVO_CTRLDATA is an open-drain signal that will act as a strap during reset to tell the GMCH
whether the interface is a PCI Express interface or an SDVO interface. When implementing
SDVO, either via ADD2 cards or with a down device, a pull-up is placed on this line to signal to
the GMCH to run in SDVO mode and for proper GMBus operation.
12.7.2.2
ADD2 Card
When a 915G Express chipset platform uses a PCI Express* x16 Graphics Interface connector,
the multiplexed SDVO ports may be used via an ADD2 card. The ADD2 card will be designed to
fit a standard PCI Express (x16) connector.
12.7.2.2.1 TMDS Capabilities
The GMCH is compliant with DVI Specification 1.0. When combined with a DVI compliant
external device and connector, the GMCH has a high speed interface to a digital display
(e.g., flat panel or digital CRT). When combining the two multiplexed SDVO ports, the GMCH
can drive a flat panel up to 2048x1536 or a dCRT/HDTV up to 1920x1080. Flat Panel is a fixed
resolution display. The GMCH supports panel fitting in the transmitter, receiver or an external
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