82443MX Datasheet, PDF (55/173 Pages) Intel Corporation – PCIset

82443MX PCIset
960 KB - 1 MB Memory (BIOS Area)
System BIOS Area
There are sixteen memory segments in the compatibility area. Thirteen of the memory ranges can be
enabled or disabled independently for both read and write cycles. One segment (512K-640K) can be mapped
to either main DRAM or PCI. This section describes the various memory regions.
6.2.1.1 DOS Area (00000h-9FFFh; 0 - 640 KB)
The DOS area is 640 KB in size and it is further divided into two parts. The 512-KB area at 0 to 7FFFFh is
always mapped to the main memory, while the 128-KB address range from 080000 to 09FFFFh can be
mapped to external PCI or to main DRAM. By default this range is mapped to main memory and can be
declared as a main memory hole (accesses forwarded to external PCI) via the FDHC Configuration Register.
6.2.1.2 Video Buffer Area (A0000h-BFFFFh; 640 - 768 KB)
The 128-Kbyte graphics adapter memory region is mapped to a legacy video device on external PCI (typically
a VGA controller). The attribute bits do not control this area. Processor-initiated cycles in this region are
always forwarded to external PCI for termination. This region is also the default region for SMM space.
The SMRAM Control Register controls how SMM accesses to this space are handled.
6.2.1.3 Expansion Area (C0000h-DFFFFh; 768 - 896 KB)
This 128-Kbyte expansion region is divided into eight 16-Kbyte segments. Each segment can be assigned
one of four Read/Write states in main memory: read-only, write-only, read/write, or disabled. Typically, these
blocks reside on the external PCI memory and are therefore given attribute "disabled" in main memory.
Memory that is disabled is not remapped.
6.2.1.4 Extended System BIOS Area (E0000h-EFFFFh; 896 - 960 KB)
This 64-Kbyte area is divided into four 16-Kbyte segments. Each segment can be assigned independent read
and write attributes so that reads and writes can be independently mapped to main DRAM or to the ROM
BIOS. Typically, this area is used for RAM or ROM. Memory segments that are disabled are not remapped
elsewhere.
6.2.1.5 System BIOS Area (F0000h-FFFFFh; 960 KB - 1 MB)
This area is a single 64-Kbyte segment. This segment can be assigned read and write attributes. It is by
default (after Reset) Read/Write disabled in main memory so that cycles are forwarded to the X-bus (ROM
BIOS). By manipulating the Read/Write attributes, the X-bus-based BIOS can “shadowed” into main DRAM.
When disabled, this segment is not remapped.
6.2.2 EXTENDED MEMORY AREA
This memory area covers the 0010 0000h (1 MB) to FFFF FFFFh (4 GB-1) address range and is divided into
the following regions:

Main DRAM memory from 1 MB to the Top of main Memory; maximum TOM is 128/256 MB, using
16Mb/64Mb/128Mb DRAM technology.
43