82443MX Datasheet, PDF (45/173 Pages) Intel Corporation – PCIset

82443MX PCIset
Table 25. DRAM Interface Signals
Name
Reset/
Cold
Reset
After Entering State During STD/ Internal Clamp Comments
Reset POS/STR POS/STR Mech. Off pu/pd Disabled
(also optional
in
Reset)
Suspend
Notes
CKE[3:0] H
H
CKE
L
Pwrdn —
No
clamps
CKE used
for Self Ref
cmd when
enter SP.
CKE
remains ‘L’
during SP.
CS[3:0]# Un-
H
defined
Self Ref H
Pwrdn —
No
clamps
CKE used
for Self Ref
cmd when
enter SP.
DQM[7:0] H
H
H
H
Pwrdn —
No
clamps
MA[10] Z
DR DR
DR
Pwrdn
50k pu No
clamps
Used for
straps, Z
during
Reset and
Suspend.
MA[11]# Z
DR DR
DR
Pwrdn
50k pu No
clamps
Used for
straps, Z
during
Reset and
Suspend.
MA[13], Z
MA[12]#,
MA[9:0]#
DR DR
DR
Pwrdn
50k pd No
clamps
Used for
straps, Z
during
Reset and
Suspend.
MD[63:0] Un-
DR DR
DR
defined
Pwrdn —
Yes
SCAS# H
H
L
L
Pwrdn —
No
clamps
SCAS# is
used for
Self Ref
cmd when
enter SP.
33