82443MX Datasheet, PDF (46/173 Pages) Intel Corporation – PCIset

82443MX PCIset
Name
SRAS#
WE#
Reset/
Cold
Reset
After Entering State During STD/ Internal Clamp Comments
Reset POS/STR POS/STR Mech. Off pu/pd Disabled
(also optional
in
Reset)
Suspend
Notes
H
H
L
L
Pwrdn —
No
clamps
SRAS# is
used for
Self Ref
cmd when
enter SP.
H
H
H
H
Pwrdn —
No
clamps
Table 26. Miscellaneous Signals
Name
During Before
Cold Reset Reset
After State Isolate to Pu/pd
Reset During ‘H’ in
POS/STR Suspend
Notes
DCLK Pulldown
—
—
—
—
(input) enabled
During Suspend:

Driven by ext clk buffer
in Normal config, this
buffer is not powered
down in SP, thus
resistor is disabled.

To avoid floating, a
pulldown is used.
Also connected during cold
Reset.
DCLKO DR
(output)
DR
DR
L or H
—
— Ext clk buffer remains
powered during STR and
Normal config.
There is no clk buffer in
MMO config.
HCLKIN Pulldown
—
—
—
(input) enabled
Int pd
100K
Weak pulldown keeps clk
low in STR (when synth.
May be powered down)
while leaks very little current
in POS. Resistor is disabled
in Normal operation.
Also connected during cold
Reset.
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