82443MX Datasheet, PDF (143/173 Pages) Intel Corporation – PCIset

82443MX PCIset
During the other two phases (Turn-around and Recovery), no device should drive the SERIRQ signal.
The IRQ/DATA frames have a specific order and usage, as shown in Table 73.
Data Frame Number
1
IRQ0
Table 73. SIRQ Frames
Usage
# Clocks Past Start
2
2
IRQ1
5
3
SMI#
8
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22-32
IRQ3
11
IRQ4
14
IRQ5
17
IRQ6
20
IRQ7
23
IRQ8
26
IRQ9
29
IRQ10
32
IRQ11
35
IRQ12
38
IRQ13
41
IRQ14
44
IRQ15
47
IOCHCK#
50
PCI INTA#
53
PCI INTB#
56
PCI INTC#
59
PCI INTD#
62
Unassigned
96
Notes
Not supported by the
440MX.
Causes EXSMI# to go
active
Not Supported
Supported
Supported
Supported
Supported
Not Supported
The 440MX is not required to broadcast internal interrupt states. This greatly reduces the amount of
transitions on the SERIRQ signal and simplifies the state machine.
131