82443MX Datasheet, PDF (12/173 Pages) Intel Corporation – PCIset

82443MX PCIset
Table 74. IDE Legacy I/O Ports: Command Block Registers (CS1x# Chip Select) ...................................... 134
Table 75. IDE Legacy I/O Port Definition: Control Block Registers (CS3x# Chip Select) ............................. 134
Table 76. Command Strobe Width for IDE Transaction Types...................................................................... 137
Table 77. IDETIMx Timing Modes for Drives 0 and 1 ................................................................................... 138
Table 78. Ultra DMA/33 Control Signal Redefinition ..................................................................................... 141
Table 79. System Clocking........................................................................................................................... 149
Table 80. 82440MX Package Dimensions .................................................................................................... 154
Table 81. Alphabetical BGA Pin List ............................................................................................................. 155
Table 82. GPIO Pin List................................................................................................................................ 161
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