MC68HC08AZ32A Datasheet, PDF (98/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

External Interrupt (IRQ) Module
IMASK — IRQ Interrupt Mask Bit
Writing a 1 to this read/write bit disables IRQ interrupt requests. Reset clears IMASK.
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
MODE — IRQ Edge/Level Select Bit
This read/write bit controls the triggering sensitivity of the IRQ pin. Reset clears MODE.
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
MC68HC08AZ32A Data Sheet, Rev. 2
98
Freescale Semiconductor