MC68HC08AZ32A Datasheet, PDF(295/312 Page) Motorola, Inc – HCMOS Microcontroller Unit

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MC68HC08AZ32A Datasheet, PDF (295/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

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CGM Acquisition/Lock Time Information

20.11 CGM Acquisition/Lock Time Information

Characteristic(1)

Symbol

Min

Typ(2)

Max(2)

Unit

Manual mode time to stable(3)

tACQ

â

(8 x VDDA) /

(fCGMXCLK x KACQ)

â

s

Manual stable to lock time(3)

tAL

â

(4 x VDDA) /

(fCGMXCLK x KTRK)

â

s

Manual acquisition time

tLock

â

tACQ + tAL

â

s

Tracking mode entry frequency

tolerance

DTRK

0

â

Â± 3.6

%

Acquisition mode entry frequency

tolerance

DUNT

Â± 6.3

â

Â± 7.2

%

LOCK entry freqency tolerance

DLOCK

0

â

Â± 0.9

%

LOCK Exit freqency tolerance

DUNL

Â± 0.9

â

Â± 1.8

%

Reference cycles per acquisition mode

measurement

nACQ

â

32

â

â

Reference cycles per tracking mode

measurement

nTRK

â

128

â

â

Automatic mode time to stable(3)

tACQ

nACQ/fCGMXCLK

(8 x VDDA) /

(fCGMXCLK x KACQ)

â

s

Automatic stable to lock time(3)

tAL

nTRK/fCGMXCLK

(4 x VDDA) /

(fCGMXCLK x KTRK)

â

s

Automatic lock time

tLock

â

0.65

25

ms

PLL jitter, deviation of average bus

frequency over 2 ms (4) (5)

0

â

Â± (fCRYS) x (.025%) %

x (N/4)

K value for automatic mode time to

stable

KACQ

â

0.2

â

â

K value

KTRK

â

0.004

â

â

1. VDD = 5.0 Vdc Â± 0.5 V, VSS = 0 Vdc, TA = â40Â°C to TA(MAX), unless otherwise noted.

2. Conditions for typical and maximum values are for run mode with fCGMXCLK = 8 MHz, fBUSDES = 8 MHz, N = 4, L = 7, dis-

charged CF = 15 nF, VDD = 5 Vdc.

3. If CF is chosen correctly.

4. Guaranteed but not tested. Refer to 4.3.2 Phase-Locked Loop Circuit (PLL) for guidance on the use of the PLL.

5. N = VCO frequency multiplier.

MC68HC08AZ32A Data Sheet, Rev. 2

Freescale Semiconductor

295

▷