MC68HC08AZ32A Datasheet, PDF (280/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Development Support
19.3.1.2 Monitor Vectors
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt), and break interrupt
than those for user mode. The alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code. The COP module is disabled in
monitor mode as long as V_TST is applied to either the IRQ pin or the RST pin.
Table 19-2 summarizes the differences between user mode and monitor mode regarding vectors.
Table 19-2. Mode Differences
Modes
User
Monitor
COP
Enabled
Disabled⁽¹⁾
Reset
Vector High
$FFFE
$FEFE
Reset
Vector Low
$FFFF
$FEFF
Functions
Break
Vector High
$FFFC
$FEFC
Break
Vector Low
$FFFD
$FEFD
SWI
Vector High
$FFFC
$FEFC
SWI
Vector Low
$FFFD
$FEFD
1. If the high voltage (V_TST) is removed from the IRQ pin while in monitor mode, the SIM asserts its COP enable output. The
COP is a mask option enabled or disabled by the COPD bit in the configuration register. See 20.5 5.0 Volt DC Electrical
Characteristics.
19.3.1.3 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
START
BIT BIT 0
BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
Figure 19-9. Monitor Data Format
NEXT
START
STOP BIT
BIT
19.3.1.4 Break Signal
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When the monitor receives a break signal,
it drives the PTA0 pin high for the duration of two bits and then echoes back the break signal.
MISSING STOP BIT
2-STOP BIT DELAY BEFORE ZERO ECHO
01234567
01234567
Figure 19-10. Break Transaction
19.3.1.5 Commands
The monitor ROM firmware uses these commands:
• READ (read memory)
• WRITE (write memory)
• IREAD (indexed read)
• IWRITE (indexed write)
• READSP (read stack pointer)
• RUN (run user program)
MC68HC08AZ32A Data Sheet, Rev. 2
280
Freescale Semiconductor