MC68HC08AZ32A Datasheet, PDF (156/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Input/Output (I/O) Ports
Figure 13-4 shows the port A I/O logic.
READ DDRA ($0004)
WRITE DDRA ($0004)
RESET
DDRAx
WRITE PTA ($0000)
PTAx
PTAx
READ PTA ($0000)
Figure 13-4. Port A I/O Circuit
When bit DDRAx is a 1, reading address $0000 reads the PTAx data latch. When bit DDRAx is a 0,
reading address $0000 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 13-1 summarizes the operation of the port A pins.
Table 13-1. Port A Pin Functions
DDRA
Bit
0
1
PTA
Bit
X⁽¹⁾
X
I/O Pin
Mode
Input, Hi-Z⁽²⁾
Output
Accesses to DDRA
Read/Write
DDRA[7:0]
DDRA[7:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTA
Read
Write
Pin
PTA[7:0]⁽³⁾
PTA[7:0]
PTA[7:0]
MC68HC08AZ32A Data Sheet, Rev. 2
156
Freescale Semiconductor