MC68HC08AZ32A Datasheet, PDF (158/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Input/Output (I/O) Ports
DDRB[7:0] — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 13-7 shows the port B I/O logic.
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
DDRBx
PTBx
PTBx
READ PTB ($0001)
Figure 13-7. Port B I/O Circuit
When bit DDRBx is a 1, reading address $0001 reads the PTBx data latch. When bit DDRBx is a 0,
reading address $0001 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 13-2 summarizes the operation of the port B pins.
Table 13-2. Port B Pin Functions
DDRB
Bit
0
1
PTB
Bit
X⁽¹⁾
X
I/O Pin
Mode
Input, Hi-Z⁽²⁾
Output
Accesses to DDRB
Read/Write
DDRB[7:0]
DDRB[7:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTB
Read
Write
Pin
PTB[7:0]⁽³⁾
PTB[7:0]
PTB[7:0]
MC68HC08AZ32A Data Sheet, Rev. 2
158
Freescale Semiconductor