MC68HC08AZ32A Datasheet, PDF (145/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Programmer’s Model of Control Registers
CIDAR0 Address: $0510
Bit 7
6
5
4
3
2
1
Bit 0
Read:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Write:
Reset:
Unaffected by reset
CIDAR1 Address: $050511
Bit 7
6
5
4
3
2
1
Bit 0
Read:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Write:
Reset:
Unaffected by reset
CIDAR2 Address: $0512
Bit 7
6
5
4
3
2
1
Bit 0
Read:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Write:
Reset:
Unaffected by reset
CIDAR3 Address: $0513
Bit 7
6
5
4
3
2
1
Bit 0
Read:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Write:
Reset:
Unaffected by reset
Figure 11-27. Identifier Acceptance Registers
(CIDAR0–CIDAR3)
AC7–AC0 — Acceptance Code Bits
AC7–AC0 comprise a user-defined sequence of bits with which the corresponding bits of the related
identifier register (IDRn) of the receive message buffer are compared. The result of this comparison is
then masked with the corresponding identifier mask register.
NOTE
The CIDAR0–CIDAR3 registers can be written only if the SFTRES bit in
CMCR0 is set
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
145