MC68HC08AZ32A Datasheet, PDF (169/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Port H
When bit DDRGx is a 1, reading address $000A reads the PTGx data latch. When bit DDRGx is a 0,
reading address $000A reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data. Table 13-7 summarizes the operation of the port G pins.
Table 13-7. Port G Pin Functions
DDRG
Bit
0
1
PTG
Bit
X⁽¹⁾
X
I/O Pin
Mode
Input, Hi-Z⁽²⁾
Output
Accesses to DDRG
Read/Write
DDRG[2:0]
DDRG[2:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTG
Read
Write
Pin
PTG[2:0]⁽³⁾
PTG[2:0]
PTG[2:0]
13.9 Port H
Port H is a 2-bit special function port that shares all of its pins with the KBD.
13.9.1 Port H Data Register (PTH)
The port H data register contains a data latch for each of the two port H pins.
Address: $000B
Bit 7
6
5
4
3
2
Read: 0
0
0
0
0
0
Write:
Reset:
Unaffected by reset
Alternative Functions:
= Unimplemented
Figure 13-23. Port H Data Register (PTH)
1
PTH1
Bit 0
PTH0
KBD4
KBD3
PTH[1:0] — Port H Data Bits
These read/write bits are software-programmable. Data direction of each port H pin is under the control
of the corresponding bit in data direction register H. Reset has no effect on port H data.
KBD[4:3] — Keyboard Wakeup Pins
The keyboard interrupt enable bits, KBIE[4:3], in the keyboard interrupt control register (KBICR),
enable the port H pins as external interrupt pins. See Chapter 8 Keyboard Interrupt (KBD) Module.
13.9.2 Data Direction Register H (DDRH)
Data direction register H determines whether each port H pin is an input or an output. Writing a 1 to a
DDRH bit enables the output buffer for the corresponding port H pin; a 0 disables the output buffer.
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
169