MC68HC08AZ32A Datasheet, PDF (147/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Chapter 12
Programmable Interrupt Timer (PIT)
12.1 Introduction
This section describes the programmable interrupt timer (PIT) which is a periodic interrupt timer whose
counter is clocked internally via software programmable options. Figure 12-1 is a block diagram of the
PIT.
For further information regarding timers on M68HC08 Family devices, please consult the HC08 Timer
Reference Manual (Freescale document order number TIM08RM/AD).
12.2 Features
Features include:
• Programmable PIT clock input
• Free-running or modulo up-count operation
• PIT counter stop and reset bits
12.3 Functional Description
Figure 12-1 shows the structure of the PIT. The central component of the PIT is the 16-bit PIT counter
that can operate as a free-running counter or a modulo up-counter. The counter provides the timing
reference for the interrupt. The PIT counter modulo registers, PMODH–PMODL, control the modulo value
of the counter. Software can read the counter value at any time without affecting the counting sequence.
INTERNAL
BUS CLOCK
PRESCALER
PRESCALER SELECT
CSTOP
CRST
16-BIT COUNTER
16-BIT COMPARATOR
PMODH:PMODL
PPS2 PPS1 PPS0
POF
POIE
INTER-
RUPT
LOGIC
Figure 12-1. PIT Block Diagram
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
147