MC68HC08AZ32A Datasheet, PDF (35/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

I/O Section
Addr.
$0033
$0034
$0035
$0036
$0037
$0038
$0039
$003A
$003B
↓
$003F
$0040
$0041
$0042
$0043
Name
Bit 7
6
5
4
3
2
1
Timer A Channel 4 Register ^Read: _{Bit 15}
14
13
High (TACH4H) Write:
12
11
10
9
See page 249. _Reset:
Indeterminate after reset
Timer A Channel 4 Register ^Read: _{Bit 7}
6
Low (TACH4L) Write:
See page 249. _Reset:
5
4
3
2
1
Indeterminate after reset
Timer A Channel 5 Status ^{Read: CH5F}
CH5IE
0
and Control Register Write: 0
R
(TASC5) See page 247. _Reset:
0
0
0
MS5A
0
ELS5B
0
ELS5A
0
TOV5
0
Timer A Channel 5 Register ^Read: _{Bit 15}
14
13
High (TACH5H) Write:
12
11
10
9
See page 249. _Reset:
Indeterminate after reset
Timer A Channel 5 Register ^Read: _{Bit 7}
6
Low (TACH5L) Write:
See page 249. _Reset:
5
4
3
2
1
Indeterminate after reset
ADC Status and Control ^{Read: COCO}
AIEN
Register (ADSCR) Write: R
See page 57. _Reset:
0
0
ADCO
0
ADCH4
1
ADCH3
1
ADCH2 ADCH1
1
1
ADC Data Register ^{Read: AD7}
AD6
(ADR) Write:
See page 59. _Reset:
AD5
AD4
AD3
AD2
AD1
Indeterminate after reset
ADC Input Clock Register ^Read: _ADIV2
ADIV1
ADIV0
ADICLK
0
0
0
(ADICLK) Write:
See page 59. _Reset:
0
0
0
0
0
0
0
Read:
Unimplemented Write:
Reset:
Timer B Status and Control ^{Read: TOF}
TOIE TSTOP
0
0
PS2
PS1
Register (TBSC) Write: 0
TRST
R
See page 265. _Reset:
0
0
1
0
0
0
0
Timer B Counter Register ^{Read: Bit 15}
14
13
High (TBCNTH) Write:
See page 266. _Reset:
0
0
0
12
11
10
9
0
0
0
0
Timer B Counter Register ^{Read: Bit 7}
6
5
4
3
2
1
Low (TBCNTL) Write:
See page 266. _Reset:
0
0
0
0
0
0
0
Timer B Modulo Register ^Read: _{Bit 15}
14
13
High (TBMODH) Write:
See page 267. _Reset:
1
1
1
12
11
10
9
1
1
1
1
= Unimplemented
R
= Reserved
Figure 2-2. I/O Data, Status and Control Registers (Sheet 5 of 6)
Bit 0
Bit 8
Bit 0
CH5MAX
0
Bit 8
Bit 0
ADCH0
1
AD0
0
0
PS0
0
8
0
0
0
Bit 8
1
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
35