MC68HC08AZ32A Datasheet, PDF (271/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

I/O Registers
18.8.5 TIMB Channel Registers
These read/write registers contain the captured TIMB counter value of the input capture function or the
output compare value of the output compare function. The state of the TIMB channel registers after reset
is unknown.
In input capture mode (MSxB–MSxA = 0:0) reading the high byte of the TIMB channel x registers
(TBCHxH) inhibits input captures until the low byte (TBCHxL) is read.
In output compare mode (MSxB–MSxA ≠ 0:0) writing to the high byte of the TIMB channel x registers
(TBCHxH) inhibits output compares and the CHxF bit until the low byte (TBCHxL) is written.
Register Name and Address
TBCH0H — $0046
Bit 7
6
5
4
3
2
Read:
Bit 15
14
13
12
11
10
Write:
Reset:
Indeterminate after Reset
Register Name and Address
TBCH0L — $0047
1
Bit 0
9
Bit 8
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Indeterminate after Reset
Register Name and Address
TBCH1H — $0049
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
14
Write:
Reset:
13
12
11
10
Indeterminate after Reset
9
Bit 8
Register Name and Address
TBCH1L — $004A
Bit 7
6
5
4
3
2
Read:
Bit 7
6
5
4
3
2
Write:
Reset:
Indeterminate after Reset
1
Bit 0
1
Bit 0
Figure 18-10. TIMB Channel Registers
(TBCH0H/L–TBCH1H/L)
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
271