MC68HC08AZ32A Datasheet, PDF (135/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Addr.
$0515
$0516
$0517
Programmer’s Model of Control Registers
Register
Bit 7
6
5
4
3
2
1
Read:
CIDMR1
AM7
AM6
AM5
AM4
AM3
AM2
AM1
Write:
Read:
CIDMR2
AM7
AM6
AM5
AM4
AM3
AM2
AM1
Write:
Read:
CIDMR3
AM7
AM6
AM5
AM4
AM3
AM2
AM1
Write:
= Unimplemented
R
= Reserved
Figure 11-15. MSCAN08 Control Register Structure (Continued)
Bit 0
AM0
AM0
AM0
11.13.1 MSCAN08 Module Control Register 0
Address: $0500
Bit 7
Read: 0
Write:
Reset: 0
6
5
0
0
0
0
= Unimplemented
4
SYNCH
3
TLNKEN
2
SLPAK
0
0
0
1
SLPRQ
0
Figure 11-16. Module Control Register 0 (CMCR0)
Bit 0
SFTRES
1
SYNCH — Synchronized Status
This bit indicates whether the MSCAN08 is synchronized to the CAN bus and as such can participate
in the communication process.
1 = MSCAN08 synchronized to the CAN bus
0 = MSCAN08 not synchronized to the CAN bus
TLNKEN — Timer Enable
This flag is used to establish a link between the MSCAN08 and the on-chip timer (see 11.9 Timer Link).
1 = The MSCAN08 timer signal output is connected to the timer input.
0 = The port is connected to the timer input.
SLPAK — Sleep Mode Acknowledge
This flag indicates whether the MSCAN08 is in module internal sleep mode. It shall be used as a
handshake for the sleep mode request (see 11.8.1 MSCAN08 Sleep Mode). If the MSCAN08 detects
bus activity while in sleep mode, it clears the flag.
1 = Sleep – MSCAN08 in internal sleep mode
0 = Wakeup – MSCAN08 is not in sleep mode
SLPRQ — Sleep Request, Go to Internal Sleep Mode
This flag requests the MSCAN08 to go into an internal power-saving mode (see 11.8.1 MSCAN08
Sleep Mode).
1 = Sleep — The MSCAN08 will go into internal sleep mode.
0 = Wakeup — The MSCAN08 will function normally.
SFTRES — Soft Reset
When this bit is set by the CPU, the MSCAN08 immediately enters the soft reset state. Any ongoing
transmission or reception is aborted and synchronization to the bus is lost.
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
135