MC68HC08AZ32A Datasheet, PDF (36/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory
Addr.
$0044
$0045
$0046
$0047
$0048
$0049
$004A
$004B
$004C
$004D
$004E
$004F
Name
Bit 7
6
5
4
3
2
1
Timer B Modulo Register ^Read: _{Bit 7}
6
5
4
3
2
1
Low (TBMODL) Write:
See page 267. _Reset:
1
1
1
1
1
1
1
Timer B Channel 0 Status ^Read:
and Control Register Write:
(TBSC0) See page 268. _Reset:
CH0F
0
0
CH0IE
0
MS0B
0
MS0A
0
ELS0B
0
ELS0A
0
TOV0
0
Timer B Channel 0 Register ^Read: _{Bit 15}
14
13
High (TBCH0H) Write:
12
11
10
9
See page 271. _Reset:
Indeterminate after reset
Timer B Channel 0 Register ^Read: _{Bit 7}
6
Low (TBCH0L) Write:
See page 271. _Reset:
5
4
3
2
1
Indeterminate after reset
Timer B Channel 1 Status ^{Read: CH1F}
CH1IE
0
and Control Register Write: 0
R
(TBSC1) See page 268. _Reset:
0
0
0
MS1A
0
ELS1B
0
ELS1A
0
TOV1
0
Timer B Channel 1 Register ^Read: _{Bit 15}
14
13
High (TBCH1H) Write:
12
11
10
9
See page 271. _Reset:
Indeterminate after reset
Timer B Channel 1 Register ^Read: _{Bit 7}
6
Low (TBCH1L) Write:
See page 271. _Reset:
5
4
3
2
1
Indeterminate after reset
PIT Status and Control ^{Read: POF}
POIE PSTOP
0
0
PPS2 PPS1
Register (PSC) Write: 0
PRST
See page 150. _Reset:
0
0
1
0
0
0
0
PIT Counter Register ^{Read: Bit 15}
14
13
High (PCNTH) Write:
See page 152. _Reset:
0
0
0
12
11
10
9
0
0
0
0
PIT Counter Register Low ^{Read: Bit 7}
6
5
4
3
2
1
(PCNTL) Write:
See page 152. _Reset:
0
0
0
0
0
0
0
PIT Modulo Register High ^Read: _{Bit 15}
14
13
(PMODH) Write:
See page 152. _Reset:
1
1
1
12
11
10
9
1
1
1
1
PIT Modulo Register Low ^Read: _{Bit 7}
6
5
4
3
2
1
(PMODL) Write:
See page 152. _Reset:
1
1
1
1
1
1
1
= Unimplemented
R
= Reserved
Figure 2-2. I/O Data, Status and Control Registers (Sheet 6 of 6)
Bit 0
Bit 0
1
CH0MAX
0
Bit 8
Bit 0
CH1MAX
0
Bit 8
Bit 0
PPS0
0
Bit 8
0
Bit 0
0
Bit 8
1
Bit 0
1
MC68HC08AZ32A Data Sheet, Rev. 2
36
Freescale Semiconductor