MC68HC08AZ32A Datasheet, PDF (142/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

MSCAN08 Controller (MSCAN08)
TXE2–TXE0 — Transmitter Empty
This flag indicates that the associated transmit message buffer is empty, thus not scheduled for
transmission. The CPU must handshake (clear) the flag after a message has been set up in the
transmit buffer and is due for transmission. The MSCAN08 sets the flag after the message has been
sent successfully. The flag is also set by the MSCAN08 when the transmission request was
successfully aborted due to a pending abort request (see 11.12.5 Transmit Buffer Priority Registers).
If not masked, a receive interrupt is pending while this flag is set. Clearing a TXEx flag also clears the
corresponding ABTAKx flag (ABTAK, see above). When a TXEx flag is set, the corresponding
ABTRQx bit (ABTRQ) is cleared. See 11.13.8 MSCAN08 Transmitter Control Register
1 = The associated message buffer is empty (not scheduled).
0 = The associated message buffer is full (loaded with a message due for transmission).
NOTE
To ensure data integrity, no registers of the transmit buffers should be
written to while the associated TXE flag is cleared.
The CTFLG register is held in the reset state when the SFTRES bit in
CMCR0 is set.
11.13.8 MSCAN08 Transmitter Control Register
Address: $0507
Bit 7
6
5
4
3
Read: 0
0
ABTRQ2 ABTRQ1 ABTRQ0
Write:
Reset: 0
0
0
0
0
= Unimplemented
2
TXEIE2
0
1
TXEIE1
0
Bit 0
TXEIE0
0
Figure 11-23. Transmitter Control Register (CTCR)
ABTRQ2–ABTRQ0 — Abort Request
The CPU sets an ABTRQx bit to request that an already scheduled message buffer (TXE = 0) be
aborted. The MSCAN08 will grant the request if the message has not already started transmission, or
if the transmission is not successful (lost arbitration or error). When a message is aborted the
associated TXE and the abort acknowledge flag (ABTAK) (see 11.13.7 MSCAN08 Transmitter Flag
Register) will be set and an TXE interrupt is generated if enabled. The CPU cannot reset ABTRQx.
ABTRQx is cleared implicitly whenever the associated TXE flag is set.
1 = Abort request pending
0 = No abort request
NOTE
The software must not clear one or more of the TXE flags in CTFLG and
simultaneously set the respective ABTRQ bit(s).
TXEIE2–TXEIE0 — Transmitter Empty Interrupt Enable
1 = A transmitter empty (transmit buffer available for transmission) event results in a transmitter
empty interrupt.
0 = No interrupt is generated from this event.
NOTE
The CTCR register is held in the reset state when the SFTRES bit in
CMCR0 is set.
MC68HC08AZ32A Data Sheet, Rev. 2
142
Freescale Semiconductor