MC68HC08AZ32A Datasheet, PDF (111/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Functional Description
EEDIVCLK — EEPROM Timebase Divider Clock Select Bit
EEDIVCLK selects the reference clock source for the EEPROM timebase divider. See 2.7.3.4
EEPROM Timebase Divider Register.
1 = CPU bus clock drives the EEPROM timebase divider
0 = CGMXCLK drives the EEPROM timebase divider
EESEC
This bit has no function.
EEMONSEC — EEPROM Read Protection in Monitor Mode Bit
When EEMONSEC is set the entire EEPROM array cannot be accessed in monitor mode unless a
valid security code is entered.
1 = EEPROM read protection in monitor mode enabled.
0 = EEPROM read protection in monitor mode disabled.
AZ32A — Device Indicator
This bit is used to distinguish a MC68HC08AZ32A from older non-’A’ suffix versions and always reads
as 1.
1 = ‘A’ version
0 = Non-’A’ version
NOTE
Extra care should be exercised when selecting mask option registers since
other M68HC08 Family parts may have different options. It is the user’s
responsibility to correctly define the mask option registers. If in doubt, check
with your local field applications representative.
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
111