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MC68HC08AZ32A Datasheet, PDF (57/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit
I/O Registers
3.6.1 ADC Analog Power Pin (VDDAREF)
The ADC analog portion uses VDDAREF as its power pin. Connect the VDDAREF pin to the same voltage
potential as VDD. External filtering may be necessary to ensure clean VDDAREF for good results.
NOTE
Route VDDAREF carefully for maximum noise immunity and place bypass
capacitors as close as possible to the package. VDDAREF must be present
for operation of the ADC.
3.6.2 ADC Analog Ground/ADC Voltage Reference Low Pin (AVSS/VREFL)
The ADC analog portion uses AVSS/VREFL as its ground pin. Connect the AVSS/VREFL pin to the same
voltage potential as VSS.
VREFL is the lower reference supply for the ADC.
3.6.3 ADC Voltage Reference Pin (VREFH)
VREFH is the high reference voltage for all analog-to-digital conversions.
3.6.4 ADC Voltage In (ADCVIN)
ADCVIN is the input voltage signal from one of the 15 ADC channels to the ADC module.
3.7 I/O Registers
These I/O registers control and monitor ADC operation:
• ADC status and control register (ADSCR)
• ADC data register (ADR)
• ADC clock register (ADICLK)
3.7.1 ADC Status and Control Register
The following paragraphs describe the function of the ADC status and control register.
Address:
Read:
Write:
Reset:
$0038
Bit 7
COCO
R
0
R
6
5
AIEN
ADCO
0
0
= Unimplemented
4
ADCH4
1
3
ADCH3
1
2
ADCH2
1
1
ADCH1
1
Figure 3-3. ADC Status and Control Register (ADSCR)
Bit 0
ADCH0
1
COCO — Conversions Complete Bit
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
57