MC68HC08AZ32A Datasheet, PDF (65/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Functional Description
The following conditions apply when in manual mode:
• ACQ is a writable control bit that controls the mode of the filter. Before turning on the PLL in manual
mode, the ACQ bit must be clear.
• Before entering tracking mode (ACQ = 1), software must wait a given time, t_ACQ (see 20.11 CGM
Acquisition/Lock Time Information), after turning on the PLL by setting PLLON in the PLL control
register (PCTL).
• Software must wait a given time, t_AL, after entering tracking mode before selecting the PLL as the
clock source to CGMOUT (BCS = 1).
• The LOCK bit is disabled
• CPU interrupts from the CGM are disabled
4.3.2.4 Programming the PLL
Use the following 9-step procedure to program the PLL. Table 4-1 shows the variables used and their
meaning (please also reference Figure 4-1).
Table 4-1. Variable Definitions
Variable
f_BUSDES
f_VCLKDES
f_CGMRCLK
f_CGMVCLK
f_BUS
f_NOM
f_CGMVRS
Definition
Desired bus clock frequency
Desired VCO clock frequency
Chosen reference crystal frequency
Calculated VCO clock frequency
Calculated bus clock frequency
Nominal VCO center frequency
Shifted VCO center frequency
1. Choose the desired bus frequency, f_BUSDES.
Example: f_BUSDES = 8 MHz
2. Calculate the desired VCO frequency, f_VCLKDES.
f_VCLKDES = 4 × f_BUSDES
Example: f_VCLKDES = 4 × 8 MHz = 32 MHz
3. Using a reference frequency, f_RCLK, equal to the crystal frequency, calculate the VCO frequency
multiplier, N. Round the result to the nearest integer.
N = --f--^V----^C----^L---^K---^D----^E----^S----
f_CGMRCLK
Example: N = ^{3----2-----M-----H----z--} = 8
4 MHz
4. Calculate the VCO frequency, f_CGMVCLK.
f_CGMVCLK = N × f_CGMRCLK
Example: f_CGMVCLK = 8 × 4 MHz = 32 MHz
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
65