MC68HC08AZ32A Datasheet, PDF (103/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Keyboard Module During Break Interrupts
8.5.2 Stop Mode
The keyboard module remains active in stop mode. Clearing the IMASKK bit in the keyboard status and
control register enables keyboard interrupt requests to bring the MCU out of stop mode.
8.6 Keyboard Module During Break Interrupts
The BCFE bit in the break flag control register (BFCR) enables software to clear status bits during the
break state. See 19.2 Break Module (BRK).
To allow software to clear the KEYF bit during a break interrupt, write a 1 to the BCFE bit. If KEYF is
cleared during the break state, it remains cleared when the MCU exits the break state.
To protect the KEYF bit during the break state, write a 0 to the BCFE bit. With BCFE at 0, writing to the
keyboard acknowledge bit (ACKK) in the keyboard status and control register during the break state has
no effect. See 8.7.1 Keyboard Status and Control Register.
8.7 I/O Registers
The following registers control and monitor operation of the keyboard module:
• Keyboard status and control register (KBSCR)
• Keyboard interrupt enable register (KBIER)
8.7.1 Keyboard Status and Control Register
The keyboard status and control register:
• Flags keyboard interrupt requests
• Acknowledges keyboard interrupt requests
• Masks keyboard interrupt requests
• Controls keyboard interrupt triggering sensitivity
Address: $001B
Bit 7
Read: 0
Write:
Reset: 0
6
5
0
0
0
0
= Unimplemented
4
3
2
1
Bit 0
0
KEYF
0
IMASKK MODEK
ACKK
0
0
0
0
0
Figure 8-4. Keyboard Status and Control Register (KBSCR)
Bits 7–4 — Not used
These read-only bits always read as 0s.
KEYF — Keyboard Flag Bit
This read-only bit is set when a keyboard interrupt is pending. Reset clears the KEYF bit.
1 = Keyboard interrupt pending
0 = No keyboard interrupt pending
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
103