MC68HC08AZ32A Datasheet, PDF (209/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

SIM Registers
The break module is inactive in stop mode. The STOP instruction does not affect break module register
states.
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
Figure 15-15 shows stop mode entry timing.
NOTE
To minimize stop current, all pins configured as inputs should be driven to
a logic 1 or logic 0.
CPUSTOP
IAB
STOP ADDR
STOP ADDR + 1
SAME
SAME
IDB
PREVIOUS DATA
NEXT OPCODE
SAME
SAME
R/W
NOTE: Previous data can be operand data or the STOP opcode, depending on the last instruction.
Figure 15-15. Stop Mode Entry Timing
CGMXCLK
STOP RECOVERY PERIOD
INTERRUPT
IAB
STOP +1
STOP + 2 STOP + 2
SP
SP – 1
SP – 2
SP – 3
Figure 15-16. Stop Mode Recovery from Interrupt
15.7 SIM Registers
The SIM has three memory mapped registers. Table 15-3 shows the mapping of these registers.
Address
$FE00
$FE01
$FE03
Table 15-3. SIM Registers
Register
SBSR
SRSR
SBFCR
Access Mode
User
User
User
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
209