MC68HC08AZ32A Datasheet, PDF (233/312 Pages) Motorola, Inc – HCMOS Microcontroller Unit

I/O Registers
If the MODFEN bit is set, then this pin is not available as a general purpose I/O. When the SPI is
enabled as a slave, the SS pin is not available as a general purpose I/O regardless of the value of
MODFEN. See 16.11.4 SS (Slave Select).
If the MODFEN bit is low, the level of the SS pin does not affect the operation of an enabled SPI
configured as a master. For an enabled SPI configured as a slave, having MODFEN low only prevents
the MODF flag from being set. It does not affect any other part of SPI operation. See 16.5.7 Mode Fault
Error.
SPR1 and SPR0 — SPI Baud Rate Select
In master mode, these read/write bits select one of four baud rates as shown in Table 16-4. SPR1 and
SPR0 have no effect in slave mode. Reset clears SPR1 and SPR0.
Table 16-4. SPI Master Baud Rate Selection
SPR1:SPR0
00
01
10
11
Baud Rate Divisor (BD)
2
8
32
128
The following formula is used to calculate the SPI baud rate:
Baud rate = -C----G-----M------O-----U----T--
2 × BD
where:
CGMOUT = base clock output of the clock generator module (CGM)
BD = baud rate divisor
16.12.3 SPI Data Register (SPDR)
The SPI data register is the read/write buffer for the receive data register and the transmit data register.
Writing to the SPI data register writes data into the transmit data register. Reading the SPI data register
reads data from the receive data register. The transmit data and receive data registers are separate
buffers that can contain different values. See Figure 16-3.
Address: $0012
Bit 7
6
5
4
3
2
1
Bit 0
Read: R7
R6
R5
R4
R3
R2
R1
R0
Write: T7
T6
T5
T4
T3
T2
T1
T0
Reset:
Indeterminate after reset
Figure 16-15. SPI Data Register (SPDR)
R7:R0/T7:T0 — Receive/Transmit Data Bits
NOTE
Do not use read-modify-write instructions on the SPI data register since the
buffer read is not the same as the buffer written.
MC68HC08AZ32A Data Sheet, Rev. 2
Freescale Semiconductor
233