GX1 Datasheet, PDF (83/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution

Processor Programming (Continued)
3.7 SYSTEM MANAGEMENT MODE
System Management Mode (SMM) is an enhancement of
the standard x86 architecture. SMM is usually employed for
system power management or software-transparent emula-
tion of I/O peripherals. SMM is entered through a hardware
signal “System Management Interrupt” (SMI# pin) that has
a higher priority than any other interrupt, including NMI. An
SMM interrupt can also be triggered from software using
an SMINT instruction. Following an SMM interrupt, portions
of the CPU state are automatically saved, SMM is entered,
and program execution begins at the base of SMM address
space (Figure 3-9).
The GX1 processor extends System Management Mode to
support the virtualization of many devices, including VGA
video. The SMM mechanism can be triggered by I/O activ-
ity and also by access to selected memory regions. For
example, SMM interrupts are generated when VGA
addresses are accessed. As will be described, other SMM
enhancements have reduced SMM overhead and improved
virtualization-software performance
FFFFFFFFh
Physical
Memory Space
FFFFFFFFh
Potential
SMM Address
Space
Physical Memory
4 GB
4 KB to 32 MB
Defined
SMM
Address
Space
00000000h
Non-SMM
00000000h
SMM
Figure 3-9. System Management Memory Address Space
Revision 1.0
83
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