GX1 Datasheet, PDF (73/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution

Processor Programming (Continued)
Table 3-23. Application and System Segment Descriptors TYPE Bit Definitions
TYPE
Bits [11:8]
System Segment and Gate Types
Bit 12 = 0
Application Segment Types
Bit 12 = 1
Num
SEWA
0
0000
Reserved
1
0001
Available 16-Bit TSS
2
0010
LDT
3
0011
Busy 16-Bit TSS
4
0100
16-Bit Call Gate
5
0101
Task Gate
6
0110
16-Bit Interrupt Gate
7
0111
16-Bit Trap Gate
Num
SCRA
8
1000
Reserved
9
1001
Available 32-Bit TSS
A
1010
Reserved
B
1011
Busy 32-Bit TSS
C
1100
32-Bit Call Gate
D
1101
Reserved
E
1110
32-Bit Interrupt Gate
F
1111
32-Bit Trap Gate
SEWA/SCRA:
S = Code Segment (not Data Segment)
E = Expand Down
W = Write Enable
A = Accessed
C = Conforming Code Segment
R = Read Enable
TYPE (Data Segments)
Data Read-Only
Data Read-Only, accessed
Data Read/Write
Data Read/Write accessed
Data Read-Only, expand down
Data Read-Only, expand down, accessed
Data Read/Write, expand down
Data Read/Write, expand down, accessed
TYPE (Code Segments)
Code Execute-Only
Code Execute-Only, accessed
Code Execute/Read
Code Execute/Read, accessed
Code Execute/Read, conforming
Code Execute/Read, conforming, accessed
Code Execute/Read-Only, conforming
Code Execute/Read-Only, conforming accessed
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