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GX1 Datasheet, PDF (126/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution
Integrated Functions (Continued)
4.4.2 Master/Slave Registers
When starting a BitBLT or vector operation, the graphics
pipeline registers are latched from the master registers to
the slave registers. A second BitBLT or vector operation
can then be loaded into the master registers while the first
operation is rendered. If a second BLT is pending in the
master registers, any write operations to the graphics pipe-
line registers will corrupt the values of the pending BLT.
Software must prevent this from happening by checking the
“BLT Pending” bit in the GP_BLT_STATUS register
(GX_BASE+820Ch[2]).
Most of the graphics pipeline registers are latched directly
from the master registers to the slave registers when start-
ing a new BitBLT or vector operation. Some registers, how-
ever, use the updated slave values if the master registers
have not been written, which allows software to render suc-
cessive primitives without loading some of the registers as
outlined in Table 4-20.
4.4.3 Pattern Generation
The graphics pipeline contains hardware support for 8x8
monochrome patterns (expanded to two colors), 8x8 dither
patterns (expanded to four colors), and 8x1 color patterns.
The pattern hardware, however, does not maintain a pat-
tern origin, so the pattern data must be justified before it is
loaded into the GX1 processor’s registers. For solid primi-
tives, the pattern hardware is disabled and the pattern color
is always sourced from the GP_PAT_COLOR_0 register
(GX_BASE+8110h).
Master
GP_DST_XCOOR
GP_DST_YCOOR
GP_INIT_ERROR
GP_SRC_YCOOR
Table 4-20. Graphics Pipeline Registers
Function
Next X position along vector.
Master register if written, otherwise:
Unchanged slave if BLT, source mode = bitmap.
Slave + width if BLT, source mode = text glyph
Next Y position along vector.
Master register if written, otherwise:
Slave +/- height if BLT, source mode = bitmap.
Unchanged slave if BLT, source mode = text glyph.
Master register if written, otherwise:
Initial error for the next pixel along the vector.
Master register if written, otherwise:
Slave +/- height if BLT, source mode = bitmap.
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