GX1 Datasheet, PDF (10/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution

1.0 Architecture Overview
The Geode GX1 processor series represents the sixth gen-
eration of x86-compatible 32-bit processors with sixth-gen-
eration features. The decoupled load/store unit allows
reordering of load/store traffic to achieve higher perfor-
mance. Other features include single-cycle execution, sin-
gle-cycle instruction decode, 16 KB write-back cache, and
clock rates up to 300 MHz. These features are made possi-
ble by the use of advanced-process technologies and pipe-
lining.
The GX1 processor has low power consumption at all clock
frequencies. Where additional power savings are required,
designers can make use of Suspend Mode, Stop Clock
capability, and System Management Mode (SMM).
The GX1 processor is divided into major functional blocks
(as shown in Figure 1-1):
• Integer Unit
• Floating Point Unit (FPU)
• Write-Back Cache Unit
• Memory Management Unit (MMU)
• Internal Bus Interface Unit
• Integrated Functions
Instructions are executed in the integer unit and in the float-
ing point unit. The cache unit stores the most recently used
data and instructions and provides fast access to this infor-
mation for the integer and floating point units.
Write-Back
Cache Unit
C-Bus
MMU
Integer
Unit
Internal Bus Interface Unit
X-Bus
FPU
Integrated
Functions
Graphics
Pipeline
Memory
Controller
Display
Controller
PCI
Controller
SDRAM Port
CS5530
(CRT/LCD TFT)
Figure 1-1. Internal Block Diagram
PCI Bus
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