GX1 Datasheet, PDF (142/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution

Integrated Functions (Continued)
Table 4-28. Display Controller Register Summary (Continued)
GX_BASE+
Memory
Offset
Type
Name/Function
8328h-832Bh
832Ch-832Fh
R/W DC_BUF_SIZE
Display Controller Buffer Size: Specifies the number of bytes to transfer for a line of frame
buffer data and the size of the compressed line buffer. (The compressed line buffer will be
invalidated if it exceeds the CB_LINE_SIZE, bits [15:9].)
-- Reserved
Timing Registers
8330h-8333h
8334h-8337h
8338h-833Bh
833Ch-833Fh
8340h-8343h
8344h-8247h
8348h-834Bh
834Ch-834Fh
R/W DC_H_TIMING_1
Display Controller Horizontal and Total Timing: Horizontal active and total timing
information.
R/W DC_H_TIMING_2
Display Controller CRT Horizontal Blanking Timin: CRT horizontal blank timing
information.
R/W DC_H_TIMING_3
Display Controller CRT Sync Timing: CRT horizontal sync timing information. Note, how-
ever, that this register should also be programmed appropriately for flat panel only display
since the horizontal sync transition determines when to advance the vertical counter.
R/W DC_FP_H_TIMING
Display Controller Flat Panel Horizontal Sync Timing: Horizontal sync timing information for
an attached flat panel display.
R/W DC_V_TIMING_1
Display Controller Vertical and Total Timing: Vertical active and total timing information. The
parameters pertain to both CRT and flat panel display.
R/W DC_V_TIMING_2
Display Controller CRT Vertical Blank Timing: Vertical blank timing information.
R/W DC_V_TIMING_3
Display Controller CRT Vertical Sync Timing: CRT vertical sync timing information.
R/W DC_FP_V_TIMING
Display Controller Flat Panel Vertical Sync Timing: Flat panel vertical sync timing
information.
Cursor and Line Compare Registers
8350h-8353h
8354h-8357h
8358h-835Bh
835Ch-835Fh
8360h-8363h
8364h-8367h
8368h-836Bh
836Ch-836Fh
R/W
RO
R/W
R/W
--
--
--
--
DC_CURSOR_X
Display Controller Cursor X Position: X position information of the hardware cursor.
DC_V_LINE_CNT
Display Controller Vertical Line Count: This read only register provides the current scanline
for the display. It is used by software to time update of the frame buffer to avoid tearing arti-
facts.
DC_CURSOR_Y
Display Controller Cursor Y Position: Y position information of the hardware cursor.
DC_SS_LINE_CMP
Display Controller Split-Screen Line Compare: Contains the line count at which the lower
screen begins in a VGA split-screen mode.
Reserved
Reserved
Reserved
Reserved
Default
Value
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00000000h
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