GX1 Datasheet, PDF (229/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution

Instruction Set (Continued)
Table 8-27. Processor Core Instruction Set Summary (Continued)
Flags
Real Prot’d Real Prot’d
Mode Mode Mode Mode
Instruction
NOP No Operation
NOT Boolean Complement
OIO Official Invalid Opcode
OR Boolean OR
Register to Register
Register to Memory
Memory to Register
Immediate to Register/Memory
Immediate to Accumulator
OUT Output to Port
Fixed Port
Variable Port
OUTS Output String
POP Pop Value off Stack
Register/Memory
Register (short form)
Segment Register (ES, SS, DS)
Segment Register (FS, GS)
POPA Pop All General Registers
POPF Pop Stack into FLAGS
PREFIX BYTES
Assert Hardware LOCK Prefix
Address Size Prefix
Operand Size Prefix
Segment Override Prefix
-CS
-DS
-ES
-FS
-GS
-SS
PUSH Push Value onto Stack
Register/Memory
Register (short form)
Segment Register (ES, CS, SS, DS)
Segment Register (FS, GS)
Immediate
PUSHA Push All General Registers
PUSHF Push FLAGS Register
RCL Rotate Through Carry Left
Register/Memory by 1
Register/Memory by CL
Register/Memory by Immediate
RCR Rotate Through Carry Right
Register/Memory by 1
Register/Memory by CL
Register/Memory by Immediate
RDMSR Read Tmodel Specific Register
RDTSC Read Time Stamp Counter
REP INS Input String
REP LODS Load String
REP MOVS Move String
REP OUTS Output String
REP STOS Store String
Opcode
90
F [011w] [mod 010 r/m]
0F FF
0 [10dw] [11 reg r/m]
0 [100w] [mod reg r/m]
0 [101w] [mod reg r/m]
8 [00sw] [mod 001 r/m] ###
0 [110w] ###
E [011w] #
E [111w]
6 [111w]
8F [mod 000 r/m]
5 [1 reg]
[000 sreg2 111]
0F [10 sreg3 001]
61
9D
F0
67
66
2E
3E
26
64
65
36
FF [mod 110 r/m]
5 [0 reg]
[000 sreg2 110]
0F [10 sreg3 000]
6 [10s0] ###
60
9C
D [000w] [mod 010 r/m]
D [001w] [mod 010 r/m]
C [000w] [mod 010 r/m] #
D [000w] [mod 011 r/m]
D [001w] [mod 011 r/m]
C [000w] [mod 011 r/m] #
0F 32
0F 31
F3 6[110w]
F3 A[110w]
F3 A[010w]
F3 6[111w]
F3 A[101w]
ODI T S Z AP C
FFFFFFFFF
---------
---------
- - x0- - - - -
Clock Count
(Reg/Cache Hit)
1
1
1
1
1
8-125
Issues
b
h
0- - - xxux0
1
1
1
1
1
1
b
h
1
1
1
1
---------
14 14/28
m
14 14/28
---------
15 15/29 b
h,m
---------
1/4
1/4
b
h,i,j
1
1
1
6
1
6
---------
9
9
b
h
xxxxxxxxx
8
8
b
h,n
---------
m
---------
1/3
1/3
b
h
1
1
1
1
1
1
1
1
---------
11
11
b
h
---------
2
2
b
h
x- - - - - - - x
3
u- - - - - - - x
8
u- - - - - - - x
8
3
b
h
8
8
x- - - - - - - x
4
4
b
h
u- - - - - - - x
8
8
u- - - - - - - x
8
8
---------
---------
- - - - - - - - - 17+4n 17+4n\ b
h,m
32+4n
---------
9+2n 9+2n
b
h
- - - - - - - - - 12+2n 12+2n b
h
- - - - - - - - - 24+4n 24+4n\ b
h,m
39+4n
---------
9+2n 9+2n
b
h
Revision 1.0
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