GX1 Datasheet, PDF (221/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution

Instruction Set (Continued)
8.2.2.3 CPUID Instruction with EAX = 80000002h,
80000003h, 80000004h
Extended functions 8000 0002h through 80000004h (EAX
= 80000002h, EAX = 80000003h, EAX = 80000004h) of
the CPUID instruction returns an ASCII string containing
the name of the current processor. These functions elimi-
nate the need to look up the processor name in a lookup
table. Software can simply call these functions to obtain the
name of the processor. The string may be 48 ASCII char-
acters long, and is returned in little endian format. If the
name is shorter than 48 characters long, the remaining
bytes will be filled with ASCII NUL characters (00h).
Table 8-24. Official CPU Name
80000002h
80000003h
80000004h
EAX
EBX
ECX
EDX
CPU
Name 1
CPU
Name 2
CPU
Name 3
CPU
Name 4
EAX
EBX
ECX
EDX
CPU
Name 5
CPU
Name 6
CPU
Name 7
CPU
Name 8
EAX
EBX
ECX
EDX
CPU
Name 9
CPU
Name 10
CPU
Name 11
CPU
Name 12
8.2.2.4 CPUID Instruction with
EAX = 8000 0005h
Extended function 8000 0005h (EAX = 80000005h) of the
CPUID instruction returns information about the TLB and
L1 cache to be looked up in a lookup table. Refer to Table
8-25.
Table 8-25. Standard CPUID with
EAX = 80000005h
Register
EAX
EBX
EBX
ECX
EDX
Returned
Contents
--
xx xx 70 xxh
xx xx xx 01h
xx xx xx 80h
--
Description
Reserved
TLB is 32 entry, 4-way set asso-
ciative, and has 4 KB Pages.
The CPUID instruction needs to
be executed only once with an
input value of 02h to retrieve
complete information about the
cache and TLB.
L1 cache is 16 KB, 4-way set
associated, and has 16 bytes
per line.
Reserved
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