GX1 Datasheet, PDF (173/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution

Integrated Functions (Continued)
Bit
Index 44h
7
Name
PP
6:4
FAC
3
RSVD
2:0
RAC
Index 45h-FFh
Table 4-44. PCI Configuration Registers (Continued)
Description
PCI Arbitration Control 2 Register (R/W)
Default Value = 00h
Ping-Pong:
0 = Arbiter grants the processor bus per the setting of bits [2:0].
1 = Arbiter grants the processor bus ownership of the PCI bus every other arbitration cycle.
Fixed Arbitration Controls: These bits control the priority under fixed arbitration. The priority table is as
follows (priority listed highest to lowest):
000 = REQ0#, REQ1#, REQ2#
001 = REQ1#, REQ0#, REQ2#
010 = REQ0#, REQ2#,REQ1#
011 = Reserved
100 = REQ1#, REQ2#, REQ0#
101 = Reserved
110 = REQ2#, REQ1#, REQ0#
111 = REQ2#, REQ0#, REQ1#
The rotation arbitration bits [2:0] must be set to 000 for full fixed arbitration. If rotation bits are not set to
000, then hybrid arbitration will occur. If Ping-Pong is enabled (bit 7 = 1), the processor will have priority
every other arbitration. In this mode, the arbiter grants the PCI bus to a master and ignores all other
requests. When the master finishes, the processor will be guaranteed access. At this point PCI requests
will again be recognized. This will switch arbitration from CPU to PCI to CPU to PCI, etc.
Reserved: Set to 0.
Rotating Arbitration Controls: These bits control the priority under rotating arbitration.
000 = Fixed arbitration will occur.
111 = Full rotating arbitration will occur.
When these bits are set to other values, hybrid arbitration will occur.
Reserved
Default Value = 00h
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