GX1 Datasheet, PDF (153/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution

Integrated Functions (Continued)
4.5.11 Cursor Position and Miscellaneous Registers
The Cursor Position registers contain pixel coordinate
information for the cursor. These values are not latched by
the timing generator until the start of the frame to avoid
tearing artifacts when moving the cursor.
The Cursor Position group consists of two 32-bit registers
located at GX_BASE+8350h and GX_BASE+8358h.
These registers are summarized in Table 4-28 on page
141, and Table 4-32 gives their bit formats.
Table 4-32. Display Controller Cursor Position Registers
Bit
Name
Description
GX_BASE+8350h-8353h
DC_CURSOR_X Register (R/W)
Default Value = xxxxxxxxh
31:16
15:11
10:0
RSVD
X_OFFSET
CURSOR_X
Reserved: Set to 0.
X Offset: The X pixel offset within the 32x32 cursor pattern at which the displayed portion of the cur-
sor is to begin. Normally, this value is set to zero to display the entire cursor pattern, but for cursors for
which the "hot spot" is not at the left edge of the pattern, it may be necessary to display the rightmost
pixels of the cursor only as the cursor moves close to the left edge of the display.
Cursor X: The X coordinate of the pixel at which the upper left corner of the cursor is to be displayed.
This value is referenced to the screen origin (0,0) which is the pixel in the upper left corner of the
screen.
GX_BASE+8354h-8357h
DC_V_LINE_CNT Register (RO)
Default Value = xxxxxxxxh
31:11
RSVD
Reserved (Read Only)
10:0
V_LINE_CNT Vertical Line Count (Read Only): This value is the current scanline of the display.
(RO)
Note: The value in this register is driven directly off of the DCLK, and is not synchronized with the CPU clock. Software should
read this register twice and compare the two results to ensure that the value is not in transition.
GX_BASE+8358h-835Bh
DC_CURSOR_Y Register (R/W)
Default Value = xxxxxxxxh
31:16
15:11
10
9:0
RSVD
Y_OFFSET
RSVD
CURSOR_Y
Reserved: Set to 0.
Y Offset: The Y line offset within the 32x32 cursor pattern at which the displayed portion of the cursor
is to begin. Normally, this value is set to zero to display the entire cursor pattern, but for cursors for
which the "hot spot" is not at the top edge of the pattern, it may be necessary to display the bottom-
most lines of the cursor only as the cursor moves close to the top edge of the display. If this value is
nonzero, the CUR_START_OFFSET must be set to point to the first cursor line to be displayed.
Reserved: Set to 0.
Cursor Y: The Y coordinate of the line at which the upper left corner of the cursor is to be displayed.
This value is referenced to the screen origin (0,0) which is the pixel in the upper left corner of the
screen.
This field is alternately used as the line-compare value for a newly-programmed frame buffer start off-
set. This is necessary for VGA programs that change the start offset in the middle of a frame. In order
to use this function, the hardware cursor function should be disabled.
GX_BASE+835Ch-835Fh
DC_SS_LINE_CMP Register (R/W)
Default Value = xxxxxxxxh
31:11
RSVD
Reserved: Set to 0.
10:0
SS_LINE
Split-Screen Line Compare: This is the line count at which the lower screen begins in a VGA split-
_CMP
screen mode.
Note: When the internal line counter hits this value, the frame buffer address is reset to 0. This function is enabled with the SSLC
bit in the DC_GENERAL_CFG register (see Table 4-29 on page 144).
Revision 1.0
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