GX1 Datasheet, PDF (163/247 Pages) National Semiconductor (TI) – Processor Series Low Power Integrated x86 Solution

Integrated Functions (Continued)
4.6.2.8 VGA Memory
The VGA memory requires 256 KB of memory organized
as 64 KB by 32 bits. The VGA memory is implemented as
part of system memory. The GX1 processor partitions sys-
tem memory into two areas, normal system memory and
graphics memory. System memory is mapped to the nor-
mal physical address of the DRAM, starting at zero and
ending at memory size. Graphics memory is mapped into
high physical memory, contiguous to the registers and ded-
icated cache of the GX1 processor. The graphics memory
includes the frame buffer, compression buffer, cursor mem-
ory, and VGA memory. The VGA memory is mapped on a
256 KB boundary to simplify the address generation
4.6.3 VGA Configuration Registers
SMI generation can be configured to trap VGA memory
accesses in one of the following ranges:
A0000h to AFFFFh (EGA,VGA),
B0000h to B7FFFh (MDA),
or B8000h to BFFFFh (CGA).
Range selection is accomplished through programmable
bits in the VGACTL register (Index B9h). Fine control can
be exercised within the range selected to allow off-screen
accesses to occur without generating SMIs.
SMI generation can also separately control the following I/
O ranges: 3B0h to 3BFh, 3C0h to 3CFh, and 3D0h to
3DFh. The BC_XMAP_1 register (GX_BASE+8004h) in
the Internal Bus Interface Unit has an enable/disable bit for
each of the address ranges above.
The VGA control register (VGACTL) provides control for
SMI generation through an enable bit for memory address
ranges A0000h to BFFFFh. Each bit controls whether or
not SMI is generated for accesses to the corresponding
address range. The default value of this register is zero so
that VGA accesses will not be trapped on systems with an
external VGA card.
The VGA Mask register (VGAM) has 32 bits that can selec-
tively mask 2 KB regions within the VGA memory region
A0000h to AFFFFh. If none of the three regions is enabled
in VGACTL, then the contents of VGAM are ignored.
VGAM can be used to prevent the occurrence of SMI when
non-displayed VGA memory is accessed. This is an
enhancement that improves performance for double-buff-
ered applications only.
Table 4-36 summarizes the VGA Configuration registers.
Detailed register/bit formats are given in Table 4-37. See
Section 3.3.2.2 “Configuration Registers” on page 50 on
how to access these registers.
Index
B9h
BAh-BDh
Table 4-36. VGA Configuration Register Summary
Type Name/Function
Default Value
R/W VGACTL
VGA Control Register
R/W VGAM
VGA Mask Register
00h (SMI generation disabled)
xxxxxxxxh
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