PIC18F6X2X Datasheet, PDF (98/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
REGISTER 9-6:
PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3
U-0
U-0
R-0
R-0
R/W-0 R/W-0 R/W-0
—
—
RC2IF TX2IF TMR4IF CCP5IF CCP4IF
bit 7
R/W-0
CCP3IF
bit 0
bit 7-6
bit 5
bit 4
bit 3
bit 2-0
Unimplemented: Read as ‘0’
RC2IF: USART2 Receive Interrupt Flag bit
1 = The USART2 receive buffer, RCREGx, is full (cleared when RCREGx is read)
0 = The USART2 receive buffer is empty
TX2IF: USART2 Transmit Interrupt Flag bit
1 = The USART2 transmit buffer, TXREGx, is empty (cleared when TXREGx is written)
0 = The USART2 transmit buffer is full
TMR4IF: TMR3 Overflow Interrupt Flag bit
1 = TMR4 register overflowed (must be cleared in software)
0 = TMR4 register did not overflow
CCPxIF: CCPx Interrupt Flag bit (ECCP3, CCP4 and CCP5)
Capture mode:
1 = A TMR1 or TMR3 register capture occurred (must be cleared in software)
0 = No TMR1 or TMR3 register capture occurred
Compare mode:
1 = A TMR1 or TMR3 register compare match occurred (must be cleared in software)
0 = No TMR1 or TMR3 register compare match occurred
PWM mode:
Unused in this mode.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS39612A-page 96
Advance Information
 2003 Microchip Technology Inc.