PIC18F6X2X Datasheet, PDF (306/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
MULLW
Multiply Literal with W
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[ label ] MULLW k
0 ≤ k ≤ 255
(W) x k → PRODH:PRODL
None
0000 1101 kkkk kkkk
An unsigned multiplication is
carried out between the contents
of W and the 8-bit literal ‘k’. The
16-bit result is placed in
PRODH:PRODL register pair.
PRODH contains the high byte.
W is unchanged.
None of the status flags are
affected.
Note that neither overflow nor
carry is possible in this opera-
tion. A zero result is possible but
not detected.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
Read
literal ‘k’
Q3
Process
Data
Q4
Write
registers
PRODH:
PRODL
Example:
MULLW 0xC4
Before Instruction
W
PRODH
PRODL
= 0xE2
=?
=?
After Instruction
W
PRODH
PRODL
= 0xE2
= 0xAD
= 0x08
MULWF
Multiply W with f
Syntax:
[ label ] MULWF f [,a]
Operands:
0 ≤ f ≤ 255
a ∈ [0,1]
Operation:
(W) x (f) → PRODH:PRODL
Status Affected: None
Encoding:
0000 001a ffff ffff
Description:
An unsigned multiplication is
carried out between the contents
of W and the register file location
‘f’. The 16-bit result is stored in
the PRODH:PRODL register
pair. PRODH contains the high
byte.
Both W and ‘f’ are unchanged.
None of the status flags are
affected.
Note that neither overflow nor
carry is possible in this opera-
tion. A zero result is possible but
not detected. If ‘a’ is 0, the
Access Bank will be selected,
overriding the BSR value. If
‘a’= 1, then the bank will be
selected as per the BSR value
(default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write
registers
PRODH:
PRODL
Example:
MULWF REG, 1
Before Instruction
W
REG
PRODH
PRODL
= 0xC4
= 0xB5
=?
=?
After Instruction
W
REG
PRODH
PRODL
= 0xC4
= 0xB5
= 0x8A
= 0x94
DS39612A-page 304
Advance Information
 2003 Microchip Technology Inc.