PIC18F6X2X Datasheet, PDF (266/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
REGISTER 24-6:
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
R/P-1
U-0
U-0
U-0
U-0
R/P-1
U-0
R/P-1
DEBUG
—
—
—
—
LVP
—
STVREN
bit 7
bit 0
bit 7
bit 6-3
bit 2
bit 1
bit 0
DEBUG: Background Debugger Enable bit
1 = Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
0 = Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.
Unimplemented: Read as ‘0’
LVP: Low Voltage ICSP Enable bit
1 = Low voltage ICSP enabled
0 = Low voltage ICSP disabled
Unimplemented: Read as ‘0’
STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause RESET
0 = Stack full/underflow will not cause RESET
Legend:
R = Readable bit
P = Programmable bit
- n = Value when device is unprogrammed
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
DS39612A-page 264
Advance Information
 2003 Microchip Technology Inc.