PIC18F6X2X Datasheet, PDF(375/386 Page) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

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PIC18F6X2X Datasheet, PDF (375/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

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PIC18F6X2X/8X2X

Clock Synchronization and the CKP bit

(SEN = 1) ......................................................... 195

Control Registers (general) ...................................... 175

Enabling SPI I/O ...................................................... 179

I2C Mode .................................................................. 184

Acknowledge Sequence Timing ....................... 208

Baud Rate Generator ....................................... 201

Bus Collision

During a Repeated

START Condition ..................... 212

Bus Collision During a START Condition ......... 210

Bus Collision During a STOP Condition ........... 213

Clock Arbitration ............................................... 202

Effect of a RESET ............................................ 209

I2C Clock Rate w/BRG ..................................... 201

Master Mode .................................................... 199

Reception ................................................. 205

Repeated START Timing ......................... 204

Master Mode START Condition ....................... 203

Master Mode Transmission .............................. 205

Multi-Master Communication, Bus Collision

and Arbitration ......................................... 209

Multi-Master Mode ........................................... 209

Registers .......................................................... 184

SLEEP Operation ............................................. 209

STOP Condition Timing ................................... 208

Module Operation .................................................... 188

Operation ................................................................. 178

Slave Mode .............................................................. 188

Addressing ....................................................... 188

Reception ......................................................... 189

Transmission .................................................... 189

SPI Master Mode ..................................................... 180

SPI Mode ................................................................. 175

SPI Slave Mode ....................................................... 181

SSPBUF ................................................................... 180

SSPSR ..................................................................... 180

Typical Connection .................................................. 179

MSSP Module

SPI Master/Slave Connection .................................. 179

MULLW ............................................................................ 304

MULWF ............................................................................ 304

N

NEGF ............................................................................... 305

NOP ................................................................................. 305

O

OPCODE Field Descriptions ............................................ 278

OPTION_REG Register

PSA Bit ..................................................................... 135

T0CS Bit ................................................................... 135

T0PS2:T0PS0 Bits ................................................... 135

T0SE Bit ................................................................... 135

Oscillator Configuration ...................................................... 21

EC .............................................................................. 21

ECIO .......................................................................... 21

ECIO+PLL .................................................................. 21

ECIO+SPLL ............................................................... 21

HS .............................................................................. 21

HS+PLL ...................................................................... 21

HS+SPLL ................................................................... 21

LP ............................................................................... 21

RC .............................................................................. 21

RCIO .......................................................................... 21

XT .............................................................................. 21

Oscillator Selection .......................................................... 259

Oscillator, Timer1 .............................................. 137, 139, 147

Oscillator, Timer3 ............................................................. 145

Oscillator, WDT ................................................................ 269

P

Packaging ........................................................................ 361

Details ...................................................................... 362

Marking .................................................................... 361

Parallel Slave Port (PSP) ..........................................113, 130

Associated Registers ............................................... 132

RE0/AD8/RD/P2D Pin ............................................. 130

RE1/AD9/WR/P2C Pin ............................................. 130

RE2/AD10/CS/P2B Pin ............................................ 130

Select (PSPMODE Bit) .....................................113, 130

Phase Locked Loop (PLL) ................................................. 23

PICkit 1 FLASH Starter Kit ............................................... 323

PICSTART Plus Development Programmer .................... 321

PIE Registers ..................................................................... 97

Pin Functions

AVDD .......................................................................... 20

AVSS .......................................................................... 20

MCLR/VPP/RG5 ......................................................... 11

OSC1/CLKI ................................................................ 11

OSC2/CLKO/RA6 ...................................................... 11

RA0/AN0 .................................................................... 12

RA1/AN1 .................................................................... 12

RA2/AN2/VREF- ......................................................... 12

RA3/AN3/VREF+ ........................................................ 12

RA4/T0CKI ................................................................ 12

RA5/AN4/LVDIN ........................................................ 12

RA6 ............................................................................ 12

RB0/INT0 ................................................................... 13

RB1/INT1 ................................................................... 13

RB2/INT2 ................................................................... 13

RB3/INT3/CCP2/P2A ................................................. 13

RB4/KBI0 ................................................................... 13

RB5/KBI1/PGM .......................................................... 13

RB6/KBI2/PGC .......................................................... 13

RB7/KBI3/PGD .......................................................... 13

RC0/T1OSO/T13CKI ................................................. 14

RC1/T1OSI/CCP2/P2A .............................................. 14

RC2/CCP1/P1A ......................................................... 14

RC3/SCK/SCL ........................................................... 14

RC4/SDI/SDA ............................................................ 14

RC5/SDO ................................................................... 14

RC6/TX1/CK1 ............................................................ 14

RC7/RX1/DT1 ............................................................ 14

RD0/AD0/PSP0 ......................................................... 15

RD1/AD1/PSP1 ......................................................... 15

RD2/AD2/PSP2 ......................................................... 15

RD3/AD3/PSP3 ......................................................... 15

RD4/AD4/PSP4 ......................................................... 15

RD5/AD5/PSP5 ......................................................... 15

RD6/AD6/PSP6 ......................................................... 15

RD7/AD7/PSP7 ......................................................... 15

RE0/AD8/RD/P2D ...................................................... 16

RE1/AD9/WR/P2C ..................................................... 16

RE2/AD10/CS/P2B .................................................... 16

RE3/AD11/P3C .......................................................... 16

RE4/AD12/P3B .......................................................... 16

RE5/AD13/P1C .......................................................... 16

RE6/AD14/P1B .......................................................... 16

RE7/AD15/CCP2/P2A ............................................... 16

RF0/AN5 .................................................................... 17

RF1/AN6/C2OUT ....................................................... 17

ï£© 2003 Microchip Technology Inc.

Advance Information

DS39612A-page 373

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