PIC18F6X2X Datasheet, PDF (217/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

19.0 ENHANCED UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (USART)
The Universal Synchronous Asynchronous Receiver
Transmitter (USART) module is one of the two serial
I/O modules. (USART is also known as a Serial Com-
munications Interface or SCI.) The USART can be con-
figured as a full-duplex asynchronous system that can
communicate with peripheral devices, such as CRT ter-
minals and personal computers. It can also be config-
ured as a half-duplex synchronous system that can
communicate with peripheral devices, such as A/D or
D/A integrated circuits, serial EEPROMs, etc.
The Enhanced USART module implements additional
features, including automatic baud rate detection and
calibration, automatic wake-up on Sync Break recep-
tion and 12-bit Break character transmit. These make it
ideally suited for use in Local Interconnect Network bus
(LIN bus) systems.
The USART can be configured in the following modes:
• Asynchronous (full-duplex) with:
- Auto wake-up on character reception
- Auto baud calibration
- 12-bit Break character transmission
• Synchronous - Master (half-duplex) with
selectable clock polarity
• Synchronous - Slave (half-duplex) with selectable
clock polarity
PIC18F6X2X/8X2X
The pins of USART1 and USART2 are multiplexed with
the functions of PORTC (RC6/TX1/CK1 and RC7RX1/
DT1) and PORTG (RG1/TX2/CK2 and RG2/RX2/DT2),
respectively. In order to configure these pins as a
USART:
• For USART1:
- bit SPEN (RCSTA1<7>) must be set (= 1)
- bit TRISC<7> must be set (= 1)
- bit TRISC<6> must be cleared (= 0) for
Asynchronous and Synchronous Master
modes
- bit TRISC<6> must be set (= 1) for
Synchronous Slave mode
• For USART2:
- bit SPEN (RCSTA2<7>) must be set (= 1)
- bit TRISG<2> must be set (= 1)
- bit TRISG<1> must be cleared (= 0) for
Asynchronous and Synchronous Master
modes
- bit TRISC<6> must be set (= 1) for
Synchronous Slave mode
Note:
The USART control will automatically
reconfigure the pin from input to output as
needed.
The operation of each enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTAx)
• Receive Status and Control (RCSTAx)
• Baud Rate Control (BAUDCONx)
These are detailed on the following pages in
Register 19-1, Register 19-2 and Register 19-3,
respectively.
Note:
Throughout this section, references to
register and bit names that may be associ-
ated with a specific USART module are
referred to generically by the use of ‘x’ in
place of the specific module number.
Thus, “RCSTAx” might refer to the
Receive Status register for either USART1
or USART2
 2003 Microchip Technology Inc.
Advance Information
DS39612A-page 215